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RECONFIGURABLE LOGIC

System-Level Design Space Exploration of Dynamic Reconfigurable Architectures

Case Study / Design Space Exploration / System-level design / Boolean Satisfiability / System performance / Dynamic Reconfiguration / RECONFIGURABLE LOGIC / Dynamic Reconfiguration / RECONFIGURABLE LOGIC

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Mapping Data-Parallel Tasks Onto Partially Reconfigurable Hybrid Processor Architectures

Distributed Computing / Computer Hardware / Processor Architecture / Reconfigurable Hardware / Software Implementation / Field Programmable Gate Array / Data transfer / Load distribution / Partial Reconfiguration / Discrete wavelet transform / Divisible Load Theory / Electrical And Electronic Engineering / RECONFIGURABLE LOGIC / Finite Impulse Response (FIR) / Field Programmable Gate Array / Data transfer / Load distribution / Partial Reconfiguration / Discrete wavelet transform / Divisible Load Theory / Electrical And Electronic Engineering / RECONFIGURABLE LOGIC / Finite Impulse Response (FIR)

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